Cleaning and No-Clean Process Control using the SIR Test Method and Electrical Twin

Cleanliness of materials, components, and manufacturing processes are integrated together as the overall PCBA contamination level is determined by each step in the process. Complex components, such as integrated circuit packaging, leadless, and bottom terminated components trap contamination within the component’s interior. Secondary processes that include wave/selective soldering, manual soldering, and topical cleaning can spread contamination to neighboring components. Controlling the process for acceptable levels of flux and process contamination improves reliability.
Miniaturization of electronics means smaller PCB layouts, smaller components, lower standoffs, and multiple PCB layers. Contamination risks are not uniform across the assembly. Localized contamination is more likely to cause a failure than the risk based on the average overall contamination level found on the PCB. Each of these factors contributes to the overall cleanliness due to the difficulty associated with the required cleaning steps.
The purpose of this research is to design electrical twin test boards in the waste area of a panel of production boards, which are highly representative of production hardware. The selected components used on the electrical twin exhibit a high risk for trapping contamination. The electrical twin test boards will be used as a process control monitor using the temperature-humidity-bias test method. The data will be plotted into an ẌR chart. The CpK will be tabulated and monitored.